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Hire the best Verilog / VHDL Developers in Ontario

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  2. Verilog / VHDL Developers
  3. Canada
  4. (Current) Ontario
  • $89 hourly

    • 5.0/5
    • (2 jobs)
    A jack of all trades, two decades of diverse experience as a full-stack engineer with a multidisciplinary skill set that spans from ASIC and hardware design to embedded systems, complicated mathematical algorithms, AI and Machine Learning, web development, mobile application development and cloud services. Keywords: ASIC, Verilog, Logic Design, Architecture, Algorithms, FPGA, AI, Machine Learning, Python, OpenCV, Image Processing, Embedded, Bluetooth, BLE, Apache Cordova, Ionic, Capacitor, JavaScript, Angular, RxJS, Mobile Apps Development, iOS, Objective-C, Android, Java, Cordova plugins development, C++, AWS, Parse Server, Backend, Node.js, Cloud Services, PHP, WordPress, SQL, Zendesk, ZAF
    vsuc_fltilesrefresh_TrophyIcon Verilog / VHDL
    Verilog
    FPGA
    Zendesk API
    DevOps
    AWS Application
    PHP
    CSS
    WordPress Development
    Angular
    Ionic Framework
    Apache Cordova
    Machine Learning
    C++
    JavaScript
    Python
  • $55 hourly

    • 5.0/5
    • (1 job)
    Expert in MATLAB, C++, FPGA, SoC, VHDL, Verilog, SystemC, GNSS, Systems Engineering, AI, Research Writing, eCommerce Development, Web Design, Proof-reading, and Plagiarism-check.
    vsuc_fltilesrefresh_TrophyIcon Verilog / VHDL
    English
    Xilinx
    System Testing
    FPGA
    C++
    MATLAB
    Writing
    Neural Network
    Ecommerce Website Development
    Verilog
    Systems Engineering
    JavaScript
    Python
  • $50 hourly

    • 0.0/5
    • (0 jobs)
    ʘ [Logic | Hardware | Digital | RTL | Front-End] Design and Verification Engineer {ASIC| FPGA} ʘ Digital Design and Verification Engineer Seasoned computer hardware architect with experience spanning research and taking ideas to product Design: Digital design, ASIC design flow, FPGA, Hardware Architecture and Micro-architecture, RTL Coding, Logic Synthesis and Optimization, CDC, STA, Lint Verification and Test: JTAG, DFT, BIST, Logic and Functional test, UVM, Code coverage, System Verilog HDLs: Verilog, System Verilog, VHDL; Software and/or languages: C/C++; Phyton, Perl OS: Linux, Unix, Windows University of Toronto, ECE Dept., Toronto, Canada Ph.D., Computer Engineering, Total GPA: 3.
    vsuc_fltilesrefresh_TrophyIcon Verilog / VHDL
    FPGA
    Academic Writing
    Academic Content Development
    Academic Editing
    Technical Writing
    Grammar & Syntax Review
    Python
    Perl
    C++
    C
    VHDL
    Hardware Design
    Verilog
    SystemVerilog
  • $25 hourly

    • 0.0/5
    • (0 jobs)
    I'm a developer experienced in working on firmware and lower level technology. Experienced with verilog hardware tcl and VHDL Experienced with C++, Python, Rust
    vsuc_fltilesrefresh_TrophyIcon Verilog / VHDL
    Computer Hardware
    Hardware Description Language
    Back-End Development
    C++
    Python
    FPGA
    Verilog
  • $25 hourly

    • 0.0/5
    • (4 jobs)
    I am a recent Engineering graduate holding a Bachelors Degree of Mechatronics Engineering. During my degree, I have developed strong software development skills working primarily in C, C++, and Python. Additionally, I have familiarized myself with a wide array of microcontrollers and microprocessors (ARM, Arduino, Pi) and working on FPGAs using Verilog and VHDL. I am fluent in Matlab and experienced with several software development kits. In addition to these hardware and software skills, I have developed a strong foundation of mathematics and physics which allow me to conduct design computations comfortably. I have been working as a copywriter and editor, primarily on technical documents over the course of my education.
    vsuc_fltilesrefresh_TrophyIcon Verilog / VHDL
    Copywriting
    Verilog
    Design Writing
    FPGA
    Arduino
    Editing & Proofreading
    Writing
    C++
    C
    MATLAB
  • $80 hourly

    • 0.0/5
    • (0 jobs)
    An experienced RTL/digital design and verification engineer-technical leader with extensive experience in all stages of front-end and back-end FPGA/ASIC design including high level design specification, Verilog RTL development, synthesis and static timing result analysis, test case development and verification techniques. Extensive hands on experience in developing HDL testbenches and bus functional models in C. A self motivated designer, yet an excellent team leader, able and eager to learn new technologies promptly.
    vsuc_fltilesrefresh_TrophyIcon Verilog / VHDL
    Xilinx
    FPGA
    Verilog
  • $20 hourly

    • 0.0/5
    • (0 jobs)
    I am a passionate engineer specializing in ASIC design and verification with expertise in FPGA emulation, RTL coding, and advanced EDA tools. Whether you need robust RTL designs, FPGA optimization, or technical documentation, I am committed to delivering exceptional solutions tailored to your needs. - Deep understanding of ASIC design flow, CMOS fundamentals, and protocols like TCP/IP, AXI, and PCIe. - Advanced skills in Verilog, Python, C++, and Perl scripting. My work ethic is defined by adaptability, attention to detail, and a collaborative approach, which I have demonstrated through complex projects and high-pressure environments. Let’s work together to bring your ideas to life with cutting-edge technology and innovative solutions! Feel free to reach out—let’s create something exceptional together. 🌟
    vsuc_fltilesrefresh_TrophyIcon Verilog / VHDL
    FPGA
    PCI
    TCP/IP
    Perl
    Digital Design
    C
    Perforce
    Linux
    SystemVerilog
    Verilog
    VLSI
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