Sana U.
Karachi, Pakistan
ASIC Design Verification Engineer
$20.00/hr
Research on FPGA (Verilog), System Designing and implementation
and Testing and Design Space Exploration. Nowadays I am working
on FIR Filter and proximate computing with Dr Rehan Hafeez.
Now I am learning, machine learning to develop ML algorithm on
FPGA which give a better spade.
Work history
ASIC Verification -- CocoTB -- UVM
5.00
May 14, 2022
-
Jun 16, 2022
Private earnings
SystemVerilog Assertions from Timing Diagram
Aug 12, 2023
-
Present
Job in progress
Private earnings
Design for Low Power IP
Mar 2, 2022
-
Present
Job in progress
Private earnings
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Skills
- SystemVerilog
- VLSI
- Verilog
- VHDL
- FPGA