Controller PCB layout/design

I'm an industrial controls engineering firm developing a production instrument. The **electrical engineering is complete** — this contract is schematic capture and board layout only, working from a detailed design specification (attached after NDA). You will NOT be making component selections, architecture decisions, or firmware choices. The spec defines every IC, every pin assignment, every interface, and a floor-plan for the layout. You bring clean capture, disciplined mixed-signal layout, and JLCPCB-ready outputs. **The job is TWO boards + one harness definition:** *Board 1 — CPU board:* ~100 × 80 mm 4-layer, outline and mounting holes FIXED (enclosure cover bosses — drawing provided). - ESP32-S3-WROOM-1 module - Precision analog: 24-bit bridge ADC (ADS1220) load-cell front end — quiet ground partitioning and Kelvin routing - Small-signal RF/IF: 24 GHz radar interface with op-amp bandpass - Isolated 4–20 mA source (DAC + XTR117 + isolated DC-DC) - W5500 Ethernet (SPI), RS485 transceiver, I2C peripherals (RTC, I/O expander, keypad scanner, DAC), microSD - FFC/ZIF to EVE4 intelligent display + keypad ZIF (orientations specified) - 24 VDC buck (LMR33630), keyed 24-pos interboard harness header *Board 2 — Terminal board:* simple 2-layer, field-termination and protection board. Pluggable terminal blocks, polyfuse/TVS/reverse protection, 4× relays with drivers, optocoupled input conditioning, pulse output opto, load-cell + RS485 + loop terminals. Positions coordinate with enclosure base (drawing provided). *Harness:* 24-pos Micro-Fit-class pinout is defined in the spec — you place the mating headers per drawing. **Deliverables:** 1. Schematics for both boards (EasyEDA Pro strongly preferred — we order assembly through JLCPCB; KiCad acceptable if you provide full JLC BOM/CPL) 2. CPU board: 4-layer layout per the floor-plan in the spec. Terminal board: 2-layer layout per the base drawing. 3. Gerbers, drill, pick-and-place (CPL), and BOMs with LCSC part numbers for BOTH boards, ready for JLCPCB economic PCBA upload 4. 3D step export of both finished boards 5. One revision cycle after my design review included **To apply, include:** - 2–3 examples of mixed-signal boards you've laid out (analog precision + switching MCU on one board) - Confirmation you work in EasyEDA Pro (or your KiCad→JLC workflow) - Your realistic turnaround NDA required before the full specification is shared. Ongoing work available — this is board 1 of a product family. ## Screening questions 1. Describe how you would partition grounds for a 24-bit bridge ADC sharing a board with an ESP32 WiFi module. 2. What is your process for ensuring JLCPCB assembly parts are in stock at quote time? 3. Have you laid out isolated 4–20 mA or other loop-powered circuits before?