ESP32-C6 BLE Sensor PCB — Schematic + 4-Layer Layout | Coin-Cell Low-Power | Complete Spec Provided

What this is Design and layout of a small battery-powered wireless sensor board for a buried, high-humidity industrial monitoring product. 31.5 mm circular, 4-layer, ESP32-C6 module, CR2450 coin cell, two sensors, micro-USB for programming. The board is epoxy-potted in a 3D-printed housing after assembly, so component height is tightly constrained. A complete written specification already exists. It covers the full BOM with LCSC part numbers, the power tree, GPIO constraints, mechanical stack, layout priorities, and acceptance criteria. You will not be designing from a vague brief — you'll be executing a document. It runs about 15 pages and I'll share it with shortlisted candidates. Scope Schematic capture 4-layer PCB layout, 31.5 mm circular outline with two keying notches Fab-ready Gerbers, drill files, pick-and-place BOM in two variants (one PCB, two populations via DNP) with LCSC part numbers GPIO allocation table Written flashing procedure, validated 3D STEP model Not in scope: firmware, mechanical/enclosure design, assembly, testing of physical boards. The genuinely hard parts Three constraints drive this design and the spec is prescriptive about all three: Coin-cell power integrity. The ESP32-C6 draws 80–90 mA on BLE transmit. A CR2450 cannot supply that directly. The design uses a low-quiescent buck-boost plus a bulk capacitor, and a prior revision of this board failed because the regulator's enable pin was wired to its own output — an unrecoverable latch at cold start. Cold-start-from-battery is acceptance criterion #1. Integrated-antenna keepout. The ESP32-C6-MINI-1's PCB antenna requires a strict no-copper region on all layers. On a 31.5 mm circular board this is the primary placement constraint and everything else works around it. Component height ceiling of 2.4 mm (set by the module itself), because the board is potted in a 12 mm cavity. This rules out D-case tantalums and standard USB connectors — mid-mount only. Background you should know I've attempted this board twice myself and shipped blocking defects both times — first a non-functional programming path, then the regulator enable issue above. The specification is deliberately defensive about both. I'm hiring for expertise I don't have, and I'd rather you push back during schematic review than work around something questionable. Process Two review gates: Gate 1 — schematic, GPIO allocation table, power tree. Before layout starts. Gate 2 — layout, keepout compliance statement, programming pad accessibility. Before Gerber release. Tools: KiCad or EasyEDA preferred (I use EasyEDA and order through JLCPCB). Altium acceptable with readable exports. Timeline: I need Gerbers within 2 weeks of start. This is a hard deadline tied to a field deployment window.