H.265 FPGA Implementation with Vitis HLS

Posted 2 weeks ago

Worldwide

Summary

We'd like to engage an FPGA design engineer to implement HEVC (H.265) Encoder for 1K@30fps using AMD Vitis HLS. The final implementation should fit on AMD Spartan or Artix FPGA family. We are a chip design startup, and the designed IP core will be deployed in various computer vision products/ applications. We are looking for an expert with deep knowledge and prior experience in implementing video encoding algorithms (H.264/H.265) on FPGAs.

Less than 30 hrs/week
Hourly
1-3 months
Duration
Expert
Experience Level
$35.00
-
$65.00
Hourly
Remote Job
Ongoing project
Project Type

Skills and Expertise

Mandatory skills

FPGA

Video Encoder

HEVC

Activity on this job

Proposals:20 to 50
Last viewed by client:2 weeks ago
Interviewing:
0
Invites sent:
0
Unanswered invites:
0

About the client

Member since Jun 17, 2026

United States
10:26 AM

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