Power Electronics Engineer to Adapt Open-Source VESC Controller (120V / 1200A Phase)

we are very limited with our knowlidge on this but we are building our own motor controller to work with VESC so we believe we require the below but please understand we will take advice from someone we would like to work with for ongoing upgrades as we develop the products Target Hardware Specifications: * Nominal Battery Voltage: 120V DC (~32S Li-ion / max voltage ~135V–140V) * Peak Battery Current: 600A * Peak Phase Current: 1200A (FOC Burst) * Control Firmware Baseline: VESC Open-Source Ecosystem (vedderb/bldc) * ECU Brain: STM32F405 / STM32F407 microcontroller architecture * Design Software: KiCad (Latest Stable Version) Key Engineering Requirements & Architectural Choices: 1. Galvanic Isolation: Complete electrical barrier between the 120V high-voltage traction lines and the delicate 3.3V logic computer utilizing isolated dual-channel gate drivers (e.g., Texas Instruments UCC21520 or similar automotive-grade equivalents). 2. External Power Module Pinout: The power stage must be designed to interface directly with an external industrial IGBT or SiC Half-Bridge module (e.g., Infineon EconoDUAL 3 footprint / FZ1200R17KE3_B2 or equivalent high-current blocks). 3. Isolated Current Sensing: Standard PCB shunt resistors cannot be used. The design must integrate isolated Hall-Effect Current Sensors (e.g., LEM HASS 600-S or Tamura equivalents) wrapped around external solid copper phase outputs. 4. Layout Optimizations: Tight, optimized layout geometry for gate-drive loop paths to drastically minimize parasitics and high-frequency EMI noise during high-speed switching transitions (20kHz to 40kHz). 5. Busbar Adaptability: The power stage schematic must explicitly account for the overlay of physical, CNC-machined solid copper busbars rather than relying solely on standard PCB fiberglass copper traces.