SOM and Electrical PCB Design

Phase 1 shall produce a recommended SOM architecture, component strategy, interface-risk review, preliminary power budget, proposed PCB stackup and fabrication technology, identified requirement gaps, development schedule, and a milestone-based quotation for the remaining work. Subject to successful completion of Phase 1, we anticipate a follow-on hardware engineering budget of approximately $40,000 to $75,000, excluding fabrication, assembly, components, test fixtures, certification, and major software or FPGA redevelopment. Applicants are required to provide evidence of at least one production design containing: A BGA processor or FPGA with external DDR memory eMMC or equivalent managed storage Gigabit Ethernet and USB Controlled-impedance multilayer layout Power sequencing and prototype bring-up Describe one SOM, processor, or FPGA board you personally designed through manufacturing and bring-up. Identify the processor, memory interface, PCB layer count, DDR validation method, EDA tool, prototype outcome, and which portions of the schematic, layout, and testing you performed yourself.