I'm an FPGA and embedded engineer who takes digital hardware from spec to working bring-up on real boards, architecture, RTL, verification, synthesis, timing closure, and on-board validation. On the FPGA side I write production-grade Verilog/SystemVerilog, build and debug designs in Vivado and Vitis (also ISE and Quartus when a project needs them), and target Xilinx Zynq-7000, Zynq UltraScale+, Artix/Kintex-7, and Lattice parts. Day-to-day work: clean RTL (FSMs, pipelining, CDC), AXI4/AXI-Lite/AXI-Stream SoC integration, custom IP, and constraint/timing closure on designs that have to actually meet Fmax, not just simulate. Verification is part of the job, not an afterthought, SystemVerilog testbenches, functional and code coverage, and assertions. I simulate in ModelSim/QuestaSim, Verilator, and Icarus, and debug on hardware with ILA, logic analyzer, scope, and JTAG. I go deep on RISC-V: custom RV cores, ISA extensions, and emulators, including instruction-set modification and syscall/binary remapping at the userspace level. On the embedded side I write C/C++ for microcontrollers and Linux, work with the GCC/LLVM toolchain, and handle interfaces like UART, SPI, I2C, DMA, PCIe, and Ethernet. If you have hardware or low-level software problems or need a new solution, send the spec and I'll reply with a clear scope and timeline.

Digital IC Design RTL Modeling, FPGA & IP/SoC/Embedded Development Engineer. Offering: - FPGA/ASIC RTL solutions in (System)Verilog, and VHDL. - Embedded C Coding. - Multilingual Tutoring. -------Your success is my priority------- Available Round-the-Clock | Flexible Pricing | Prioritizing Service Excellence My Experience: I've worked extensively with FPGAs, utilizing various FPGA boards from different vendors such as AMD(Xilinx)/Intel(Altera)/Efinix. Also experienced in ASIC designs, I've worked with Synopsys tools, with TCL scripts and GUI for DesignCompiler, Formality. Proficient in documentation using: - LaTeX: for professional documentation. - Markdown: for GitHub repos. - Microsoft Word. Let's collaborate and bring your project to life. Reach out to discuss the details, and I'll be here to assist you at any time. Additional Key Skills: - STA and CDC. - Communication protocols such as: UART - SPI - I2C - AXI... - Programming languages such as: C/C++. - Knowledge in scripting Language : TCL - Python . Tools: VUnit • Vivado IDE • Quartus prime • Efinity IDE • VS Code • Xilinx ISE • ModelSim/QuestaSim.

tl;dr; I am an ASIC/FPGA expert with over 2 decades of experience designing ASICs for Intel, LSI, Texas Instruments and others. ASIC FPGA Design is not an individual task, It requires a well knit team to handle RTL, Verification, Validation and PnR. I run an small ASIC/FPGA Design consultancy and we generally allocate a team of 1-RTL + 2-Verification resources for each project task. Due to this we propose a weekly fixed price team contract of 2400 USD/Week instead of an hourly billing. **Professional Summary:** I am 1. An experienced ASIC/FPGA designer 2. With contribution to over a few dozen chip tapeouts in tech nodes from 7nm to 180nm, in a career spanning over 2 decades 3. With expertise in various domains, including Communications (WiFi, Ethernet), Imaging (DTV, Display), and SOC (ARM, RISCV). I possess a comprehensive skill set encompassing System Architecture, RTL Design (Verilog, VHDL, SystemVerilog, Bluespec), Verification (Cocotb), Synthesis, and Validation. Additionally, I have a strong understanding of firmware and device driver development processes. I am available for: Long term projects with a minimum budget of $5000 requiring engineers to perform roles in 1. SOC and IP Architecture 2. RTL Coding(Verilog, Systemverilog, VHDL, Bluespec Systemverilog & Chisel), & Verification(Cocotb, UVM) 3. FPGA based Validation. 4. Synthesis + STA **Areas of Expertise:** I specialize in the following domains: 1. Communication: PCIe, Ethernet, PCS, MAC, Serdes, WLAN 2. Cryptography 3. Video & Display Technologies 4. DSP 5. SoC and subsystem development 6. Processors: ARM, RISCV **Keywords:** Verilog, ASIC, FPGA, Synopsys, Xilinx, Altera, Intel, Vivado, Quartus, Modelsim, VCS, Synthesis, Perl, Tcl, ARM, RISC-V, VHDL, BSV, cocotb, UPF, ASIP **Work Experience:** Throughout my career, I have worked with the following technologies and contributed to various projects: 1. Networking and Communication: Ethernet Subsystems, Wireless LAN, DOCSIS, DTV 2. Cryptography 3. Display Subsystems and Video Processing 4. Microcontrollers & Peripherals 5. ARM and RISCV based subsystem design I am proficient in Verilog, VHDL, SystemC, SystemVerilog, Perl, Tcl, and Python (cocotb, myHDL). I have successfully contributed to the tapeout of over a dozen ASICs. **Why Hire Me?** If you are seeking a team of professionals from Silicon Architects to junior coders who can independently or with minimal supervision drive the entire process of turning your idea for an IP/Chip into a reality, I am the right candidate for you. With my expertise and the expertise of my team, we can handle the complete lifecycle, including studying product requirements/industry standards, proposing suitable architectures and work plans, defining micro-architectures, driving verification, implementing and verifying designs, and validating the final product. **Employment Details:** 1. Current: Dyumnin Semiconductor (7 Years) - Co-Founder, CEO 2. Texas Instruments: (10 Years) - RTL Lead 3. Intel (6 Years) - Architect Ethernet Subsystems 4. CEO of a company providing ASIC design consultancy to multiple startups in RISC-V, AI/ML domain Feel free to reach out to me to discuss your project requirements and how I can contribute to its success.

Hello, thank you for checking out my profile. I'm a Certified LabVIEW and MATLAB Developer with over 5 years of experience in signal processing, FPGA, and Embedded System Design. With a strong set of skills and expertise, I bring proficiency in developing cutting-edge solutions in these domains. My strengths lie in my deep understanding of LabVIEW and MATLAB, allowing me to design and implement efficient algorithms for signal processing tasks. I excel in FPGA programming, leveraging its power to accelerate computations and optimize system performance. Additionally, my expertise extends to embedded systems design, where I have successfully developed robust solutions for various applications. Throughout my career, I have been involved in several notable projects such as Signal Processing of mm-wave Radar for Driver Drowsiness and Child Presence Detection for Vehicle In-Cabin Monitoring System which showcase my ability to deliver high-quality results. I have successfully implemented complex signal processing algorithms, enabling real-time data analysis for critical applications. Furthermore, my experience in FPGA design has led to significant improvements in system speed and efficiency. I hold a strong educational background, having obtained relevant certifications and a degree in Electrical Engineering. This foundation has equipped me with a solid theoretical understanding, which I consistently apply to real-world challenges. In summary, as a Certified LabVIEW and MATLAB Developer, I possess a wealth of experience in signal processing, FPGA, and embedded system design. My proven track record of delivering successful projects, along with my expertise and educational background, make me a valuable asset in tackling complex engineering problems. .

Senior FPGA Architect specializing in Xilinx Zynq and UltraScale+ platforms, delivering production-grade hardware architectures and high-performance embedded systems. I design scalable FPGA solutions from system architecture through RTL implementation, timing closure, Linux integration, and field deployment. My focus is building reliable, optimized, and maintainable systems — not just functional prototypes. Core Skills: FPGA Architecture & RTL Design -Verilog / VHDL (clean, timing-accurate RTL) -AXI4, AXI-Stream, AXI-Lite system design -High-throughput data pipelines -Custom IP core development -Timing closure & performance optimization -CDC handling and constraint strategy Xilinx Platforms -Zynq-7000 SoC -Zynq UltraScale+ MPSoC -Vivado (IP Integrator, Block Design, Constraints) -Vitis / SDK workflows Embedded Linux Integration -PetaLinux build systems -Device Tree customization -Kernel configuration & driver integration -U-Boot customization -PS–PL communication optimization Vision Acceleration & High-Speed Systems -Real-time image processing pipelines -MIPI CSI camera integration -Hardware acceleration using AXI-Stream architectures -DMA-based high-bandwidth transfers -Edge vision system optimization What I Deliver: -Clean and modular FPGA architecture -Production-ready Vivado & PetaLinux projects -Fully documented RTL and system design -Resource-optimized and timing-closed designs -Clear milestones and professional communication I work with startups, research teams, and industrial companies that require high-performance FPGA systems with long-term maintainability. If you need a Xilinx-focused architect who understands hardware, Linux, and system-level integration, I’m ready to support your project perfectly as you want from architecture to deployment.

I have more than 12 years experience in Embedded systems design, the main field of experience is FPGA programming, using VHDL, verilog and system verilog. I also have experience with working with Xilinx ISE, Vivado, Intel Quartus, Liberos SOC and Diamond Lattice

Working in Digital Systems Design for the last 4 years: I've written RTL for server-class RISC-V SoC components, built an Image Signal Processor pipeline that runs on FPGA, and contributed to an actual chip tape-out on SkyWater's 130nm process. I've taken designs through the full life cycle — specification, simulation, FPGA prototyping, fabrication, and silicon bring-up in the lab, where I wrote C and assembly tests to validate real hardware. Alongside design work, I also write technical articles on chip design, RISC-V, and embedded systems — so if you need documentation or engineering content that's accurate and readable, I can help with that too. Feel free to reach out or send an invitation to get started. Keywords RISC-V | Computer Architecture | RTL Design | Verilog | SystemVerilog | Chisel | Bare-Metal Firmware | Embedded C | Assembly Language | FPGA Prototyping | SoC Integration | Silicon Bring-up

Thank you for taking the time to view my profile. I'm a professional electrical engineer with experience in power electronics, digital circuits, analog circuits, and HF RF circuits. My favorite EDA tools are OrCAD or KiCad for schematics capture, Allegro or KiCad for PCB layout, LTspice for analog circuit simulation, Verilog/SystemVerilog/Vivado/ModelSim/Questa for digital and FPGA design, SIMetrix/SIMPLIS for SMPS design, dsPIC33/MPLAB/PowerSmart for digital power design. Still, I have used many other EDA tools under customer/client requests in the past, such as Pspice, TINA-TI, ADS, Quartus Prime, etc. I'm also a professional programmer with experience in PC BIOS, BSP, Linux, and Android, and I'm familiar with many programming languages such as x86 assembly, ARM assembly, C, C++, Java, Python, HTML, CSS, XML, SQL, JavaScript, Unix shell script. I have many mass production designs for domestic clients and some from foreign countries. If you want reference to some of my product designs, I can ask for the client's permission as they are mostly NDA secured. I'm serious about the intellectual properties of others. But you can view my portfolio for a LF N2PK VNA and a Red Pitaya STEMlab125 designs, both are the few best in class amateur measurement equipment with professional device quality, I improved on their original design to better fit my daily electrical test requirements, and as I just produce my own improved design for my private use, so it's legal for me to show them here without IP issues with the copyright holders. My current interest and most recent skills are FPGA, SMPS, digital power, motor control, and automotive electronics.

I have over 4+ years of experience in designing, developing, and debugging complex digital systems on Xilinx platforms, including Zynq-7000, Zynq UltraScale+, and custom FPGA boards. Proven expertise in RTL design, high-speed SERDES communication, and AXI4-based IP development. Hands-on experience with video processing pipelines using H.264 encoders, V4L2 drivers, and MIPI CSI2 interfaces, as well as embedded Linux integration via PetaLinux. Adept at multi-team collaboration, hardware bring-up, and solving intricate engineering challenges across global projects. Proficient in Xilinx Vivado, Vitis, and scripting with Python/TCL.

"I am an embedded systems engineer with substantial experience in programming languages like C, C++, VHDL, Verilog, Java and Python. My expertise extends to working with boards such as Arduino, Raspberry Pi, ESP32, STM32, and FPGAs. Additionally, I am proficient in designing and implementing communication protocols such as UART, I2C, CAN, USB, and SPI. With these skills, I can develop robust and high-performance embedded solutions for diverse applications in the fields of digital services and the Internet of Things."